A Noval Area Efficient Low Voltage & Low Power Voltage Controlled Oscillator Using Hybrid CMOS Technology.

EasyChair Preprint 4678

Abstract

This paper shows low ,power dissipation a hybrid CMOS VCO(voltage controlled oscillator) with a linear response over a wide power range.CMOS NAND three- transistor gates were used to design CMOS voltage controlled oscillator.CMOS VCOs have been suggested for three, five and seven stages in the conception of ring-based CMOS VCO circuit,and new delay cell with three CMOS NAND transistor gates with supply voltage 0.7v.The output frequency were regulated,CMOS VCO frequency,power dissipation,and hybrid CMOS voltage controlled oscillator are investigated in three five and seven stages.A hybrid CMOS-VCO device combination is used to hybrid on the VIC response without the need for a resistor or wide device.Compare with CMOS pure circuit with 0.7v tuning and control voltage,the circuit shows excellent linearity.

Keyphrases: CMOS output frequency, Cadence, VCO, power consumption

@booklet{EasyChair:4678,
  author    = {Akanksha Gupta and Rajesh Khatri and Pramod Kumar Jain},
  title     = {A Noval Area Efficient Low Voltage & Low Power Voltage Controlled Oscillator Using Hybrid CMOS Technology.},
  howpublished = {EasyChair Preprint 4678},
  year      = {EasyChair, 2020}}